The Applicant has observed a problem with instruction execution of conventional computer processors and specifically with multi-threading and parallelism. Because two instructions can be executed at the same moment in time, they can read or write the memory at a specific index at the same time. The reason this is problematic is that programs rely on the order of execution.
For example, if a web server hosting a website that has a lot of traffic, it may serve a web page using multiple threads, and the following can occur:                1. When the web server receives a request, it reads a value in memory which contains the total time the web page has been viewed.        2. The web server then increments the value and then updates the value in memory.        
More specifically, thread X and thread Y may try to access a value Z. If value Z is 10 and thread X increments the value by 5 and at the very same time thread Y increments the value by 2, it will come down to a race as to whether thread X or thread Y is the last thread to write to value Z. Therefore, the value can end up either as 15 or 12, neither of which is accurate. The final value should be 17. This phenomenon is known as Race Conditions. The predominant solution to this problem is ‘Locking’ wherein thread X locks value Z, preventing thread Y from manipulating value Z. Once thread X has completed its operation, thread Y then locks value Z preventing thread X from accessing value Z, thereby ensuring concurrency.
The Applicant believes that fundamental problems with the ‘Locking’ approach may include:                1. All other threads that are not currently accessing the specific memory index are put on hold and must wait for the lock to be released. This results in dead-time where no computations are calculated.        2. This causes a fundamental limitation wherein the time and processing power required to orchestrate and manage threads and locks outweighs the advantages gained from multi-threading on a larger scale.        3. Race Conditions are extremely challenging to find and debug and often require large architectural changes in computer code, resulting in unwanted complexity, which can result in un-maintainability. The more components there are in a program, the more room there is for bugs. The result is that a programmer's job is more difficult.        
To address this problem, it is necessary to understand how data is represented in space and time. Currently, computers store data in a mutable fashion, meaning that most areas of memory are read and writeable. Because all data or information that has ever existed, exists in the framework of space and time, the fundamental nature of information is immutable, meaning that information can't change in the current frame of time. The state of information can only propagate in a forward direction (that is, forward in time). In other words, for a given frame definition, every frame in time is immutable. When a new frame of time is created every state moves to the next frame with a change in state.
Therefore, the past cannot be changed, only the future can be changed. All data that has ever existed, or that will exist, whether the information is stored on a computer, or memorised by a human, or in any other means, must exist in the physical world in some form or another. All physical matter is subject to the laws of time. Therefore, it is safe to assume that any construct, idea or information exists physically, which in turn means that said information can be represented in an immutable fashion, as per the nature of time.
The Applicant wishes to apply this theory to processor architecture and accordingly to any computing or electronic device which comprises a processor. Because all information can be modelled immutably, a computer processor can be created that follows the same fundamental model of time. Therefore, Race Conditions theoretically cannot exist in the same way that causality cannot be violated.